1. Technical Field of the Invention
The present invention relates to an integrated DRAM (Dynamic Random Access Memory) element.
2. Description of Related Art
A DRAM element comprises, in a known manner, a field-effect transistor and an electronic component in which a quantity of electrical charge representative of a bit is stored. The component for storing the quantity of charge may, for example, be a capacitor. The transistor allows the charging of the capacitor with a predetermined quantity of charge to be controlled during a step of writing the bit into the DRAM element. It also is used to control the removal of the quantity of charge stored in the capacitor during a step of reading the bit.
It is known, in particular from document U.S. 2003/0015757, the disclosure of which is incorporated by reference, to use a portion of the transistor of the DRAM element, located on an opposite side of the channel of the transistor from the gate, to store the quantity of charge representative of the bit. This portion of the transistor is denoted hereafter as storage portion. The operation of the DRAM element in read mode or write mode is then substantially the same as for a DRAM element with a capacitor. An additional electrode is provided against the transistor, which additional electrode is capacitively coupled to the storage portion. When this electrode is polarized, a quantity of electrical charge is generated or not in the storage portion of the transistor during the write step, depending on the value of the bit. This quantity of charge remains in the storage portion after an interruption of the polarization of the electrode. During the read step, a value of the threshold voltage of the transistor is detected, which depends on whether or not charges are present in the storage portion.
The processing devices currently required to execute complex applications require large numbers of DRAM elements. These DRAM elements are produced on semiconductor substrates which correspond to an appreciable part of their manufacturing cost. There is consequently a major economic challenge to be able to produce a large number of DRAM elements on the minimum area of substrate.
There accordingly exists a need in the art for a DRAM element that is compact when considering the number of bits that can be stored.